The AY-3-8910 is a register oriented
Programmable Sound Generator. Control commands are issued to the PSG by
writing to 16 registers. Each of the 16 registers is also readable so
that the microprocessor can determine present states or stored data
values. All functions of the PSG are controlled through the 16 registers
which once programmed, generate and sustain the sounds, thus freeing the
system processor for other tasks.
In addition, there are two two eight bit
data I/O ports, called A and B, through which it interfaces the
joysticks, etc. The PSG appears to the Z80 as three I/O ports called the
Address Port, the Data Write Port and the Data Read Port.
The PSG contains sixteen internal
registers which completely define its operation. A specific register is
selected by writing its number, from 0 to 15, to this port. Once
selected, repeated accesses to that register may be made via the two
Data Write Port
This port is used to write to any register
once it has been selected by the Address Port.
Data Read Port
This port is used to read any register
once it has been selected by the Address Port.
These two registers are used to define the
frequency of the Tone Generator for Channel A. Variable frequencies are
produced by dividing a fixed master frequency with the number held in
Registers 0 and 1, this number can be in the range 0 to 4095. Register 0
holds the least significant eight bits and Register 1 the most
significant four. The PSG divides an external 1.7897725 MHz frequency by
sixteen to produce a Tone Generator master frequency of 111,861 Hz. The
output of the Tone Generator can therefore range from 111,861 Hz (divide
by 1) down to 27.3 Hz (divide by 4095). As an example to produce a
middle "A" (440 Hz) the divider value in Registers 0 and 1 would be 254.
These two registers control the Channel B
Tone Generator as for Channel A.
This register enables or disables the Tone
Generator and Noise Generator for each of the three channels: 0=Enable
1=Disable. It also controls the direction of interface ports A and B, to
which the joysticks and cassette are attached: 0=Input, 1=Output.
Register 7 must always contain 10xxxxxx or possible damage could result
to the PSG, there are active devices connected to its I/O pins. The
BASIC "SOUND" statement will force these bits to the correct value for
Register 7 but there is no protection at the machine code level.
If bit 4 is set to 1, the volume is controlled by hardware enveloping (selected with registers 11-13), and bits 3-0 are ignored.
If bit 4 is set to 0, bits 3-0 hold the volume to be used. The volume is in the range 0-15, where 0 is no volume and 15 which is maximum volume.
Register 9 This register controls the amplitude of Channel B as for Channel A.
Register 10 This register controls the amplitude of Channel C as for Channel A.
These two registers control the frequency
of the single Envelope Generator used for amplitude modulation. As for
the Tone Generators this frequency is determined by placing a divider
count in the registers. The divider value may range from 1 to 65535 with
Register 11 holding the least significant eight bits and Register 12 the
most significant. The master frequency for the Envelope Generator is
6991 Hz so the envelope frequency may range from 6991 Hz (divide by 1)
to 0.11 Hz (divide
The four Envelope Shape bits determine the shape of the amplitude modulation envelope produced by the Envelope Generator.Enveloping is used to produce special effects. It works by modifying the volume output on the channel which is enabled.
The shape of the envelope defines how the volume is affected. If the envelope slopes upwards the volume will be increased, and if the envelope slopes downwards the volume will be decreased. If the envelope repeatedly slopes up and down, the volume will repeatedly rise to a maximum and then drop a minimum.
The shapes of envelopes that can be produced is shown in the table below. 3 2 1 0 Modulation Envelope 0 0 x x |\_________________ 0 1 x x /|_________________ 1 0 0 0 |\|\|\|\|\|\|\|\|\| 1 0 0 1 |\_________________ 1 0 1 0 \/\/\/\/\/\/\/\/\/\ _________________ 1 0 1 1 \| 1 1 0 0 /|/|/|/|/|/|/|/|/|/ __________________ 1 1 0 1 / 1 1 1 0 /\/\/\/\/\/\/\/\/\/ 1 1 1 1 /|_________________ x indicates bit with any value (either 1 or 0)
To read a value from this port, it must be put into input mode by setting bit 6 of register 7 (mixer control) of the PSG to 0. Usually, this is not necessary as port A always operates as input, unless it has been changed by the user.
To write a value to this port, it must be put into output mode by setting bit 6 of register 7 (mixer control) of the PSG to 1. The user can then write the byte into the register. In the SVI-328/318, port A is used for a special function. It is used for INPUT of joystick direction status. It must ONLY be READ, writing values to this port may have an unpredicted result.
To read a value from this port, it must be put into input mode by setting bit 7 of register 7 (mixer control) of the PSG to 0. Usually, this is not necessary as port A always operates as input, unless it has been changed by the user.
To write a value to this port, it must be put into output mode by setting bit 7 of register 7 (mixer control) of the PSG to 1. The user can then write the byte into the register. In the SVI-328/318, port B is used for a special function. It is used for OUTPUT to select memory bank to be used.
The four least
significant bits are connected via TTL open-collector buffers to pins 6
and 7 of each joystick connector. They are normally set to a 1, when a
paddle or joystick is connected, so that the pins can function as
inputs. When a touchpad is connected they are used as handshaking